TC7WZ74FK 数据手册 - Toshiba（东芝）

逻辑类型Logic Type| 设置（预设）和复位 Set(Preset) and Reset \---|--- 电路数Number of Circuits| D型 D-Type 输入数Number of Inputs| 差分 Differential 电源电压VccVoltage - Supply| 1 静态电流IqCurrent - Quiescent (Max)| 1 输出高，低电平电流Current - Output High, Low| 200MHz 低逻辑电平Logic Level - Low| 2.4ns 高逻辑电平Logic Level - High| 正边沿 Positive Edge 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL| 32mA，32mA Description & Applications| 1.65 V ~ 5.5 V 描述与应用| D-Type Flip Flop with Preset and Clear Features High output current: ±24 mA (min) @VCC = 3 V Propagation delay time: tpd 2.8 ns (typ.) @VCC = 3 V, 50 pF Operating voltage range: VCC (opr) = 1.65~5.5 V High latch-up immunity: ±500 mA or more High ESD: ±200 V or more (JEITA) ±2000 V or more (MIL) Power down protection is provided on all inputs. Electrical characteristics when VCC = 3.3 V is the same as TC74LCX series.