NDS355AN 数据手册 - Fairchild（飞兆/仙童）

最大源漏极电压Vds Drain-Source Voltage| 30V \---|--- 最大栅源极电压Vgs(±) Gate-Source Voltage| 20V 最大漏极电流Id Drain Current| 1.7A 源漏极导通电阻ΩRds DΩ/Ohmain-SouΩ/Ohmce On-State Ω/Ohmesistance| 0.085Ω/Ohm @1.9A,10V 开启电压Vgs（th） Gate-Source Threshold Voltage| 1-2V 耗散功率Pd Power Dissipation| 500mW/0.5W Description & Applications| N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild"s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Industry standard outline SOT-23 surface mount package using proprietary SuperSOT TM-3 design for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON).Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface mount 描述与应用| N沟道逻辑电平增强模式场效应晶体管 概述 这些N沟道逻辑电平增强模式电源场效应晶体管都采用飞兆半导体 专有的，高密度，DMOS技术。这高密度工艺特别适合于 最大限度地减少通态电阻。这些设备是特别适合于低电压应用在笔记本 电脑，手提电话，PCMCIA卡，和其他电池供电电路中快速切换，低 线的功率损耗，需要在一个非常小外形表面贴装封装。 行业标准外形SOT-23表面贴装封装 使用专有SuperSOT 设计卓越的TM-3 热性能和电气性能。 高密度电池设计极低的RDS（ON） 卓越的导通电阻和最大DC电流能力。 紧凑型工业标准SOT-23表面贴装