最大源漏极电压Vds Drain-Source Voltage| 60V
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●最大栅源极电压Vgs(±) Gate-Source Voltage| 20V
●最大漏极电流Id Drain Current| 280mA/0.28A
●源漏极导通电阻ΩRds DΩ/Ohmain-SouΩ/Ohmce On-State Ω/Ohmesistance| 0.16Ω/Ohm 23.4A,10V
●开启电压Vgs（th） Gate-Source Threshold Voltage| 1-3V
●耗散功率Pd Power Dissipation| 3W
●Description & Applications| N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild"s proprietary, high cell density, DMOS technology.This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes.Thesedevices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed. High density cell design for extremely low RDS(ON) High power and current handling capability in a widely used surface mount package.
●描述与应用| N沟道逻辑电平增强模式场效应晶体管 概述 这些N沟道逻辑电平增强模式电源领域 场效应晶体管都采用飞兆半导体专有的生产， 高细胞密度，DMOS技术。这一密度非常高， 过程特别是针对减少通态电阻， 提供出色的开关性能，经受住了高 能量脉冲在雪崩和减刑 特别适用于低电压modes.Thesedevices 直流电动机的控制和DC / DC应用，如 转换的快速开关，低线的功率损耗， 抗瞬变是必要的。 高密度电池设计极低的RDS（ON） 一种广泛使用的高功率和电流处理能力 表面贴装封装
